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Lesson 20: Multiprocessor Servers

The very nature of LANs places tremendous demands on servers. These central repositories of data and application files literally serve the needs of the many users on the LAN. This means they’re usually interacting with more than one client at a time. Unfortunately, this isn’t the job that most computers acting as servers were designed for.

The typical first-generation network server was basically a souped-up version of an IBM-compatible personal computer with an Intel microprocessor. These very personal computers were created to deliver computing resources to individuals, not groups. As such, they contain a single CPU, or microprocessor, designed to do one thing at a time.

As single-user systems, single-CPU computers perform admirably. As multiuser servers on a network, however, they have performed less admirably. Their single-processor architecture can’t always keep up with multiple users’ demands.

The earlier, smaller networks primarily provided disk input/output and printer access. Users remained content despite delays in network service because of the benefits they derived (for example, improved company communications and shared resources).

But as LANs grow larger and the processing burden placed on servers becomes more complex, the single-CPU architecture has become less viable, especially with specialized applications that require the server to do much of the processing now performed by PCs at the desktop (for example, SQL data-base front ends). Hence, the development of a host of multiprocessor servers designed specifically for use with LANs. These computers—most notably NetFrame’s NetFrame and Compaq’s Systempro, and the clones they have spawned—are dramatically changing the way network servers are implemented in a typical network.

IT’S NOTHING NEW

Multiprocessor computers aren’t new—they’ve existed since the early 1960s. Of course, their creators called them mainframes and/or minicomputers and designed them for large-scale, centralized data processing departments, not the sort of distributed processing found in LANs. And while many networks use these, they actually make poor server alternatives: They cost too much, pose many connectivity problems, and PC-oriented users often find them hard to understand.

Enter the multiprocessor server designed for integration into LANs. These use many of the same concepts found in mainframes. For example, the NetFrame provides the redundancy and memory error detection and correction facilities found on mainframes.

In designing multiprocessor systems, computer engineers have generally taken two tacks: one known as a tightly coupled system; the second, a loosely coupled system. In the first, two or more CPUs share a common communications path (or bus) and system memory; Compaq took this approach with its Systempro. In the loosely coupled system, two or more CPUs have their own Compaq’s Systempro super server relies on two buses to maintain compatibility with existing adapters, such as network interface cards, video boards, and disk controllers. This architecture allows Compaq to update the processor-memory bus as new tech-nology develops without altering the I/O bus. 57 separate memory and communications channels but communicate over a shared bus; with modifications, this is NetFrame’s approach.

Both the NetFrame and the Systempro feature what NetFrame calls a main data path or primary data highway and a centralized main memory (8MB to 64MB on the NetFrame, up to 256MB on the Systempro). The main data path is 32 bits wide on the Systempro (Compaq calls this its processor/memory bus), and 64 bits wide on the NetFrame. From there, the two architectures vary substantially, both using proprietary designs.

THE SYSTEMPRO DESIGN

The Compaq Systempro’s design—which Compaq calls its Flexible Advanced Systems Architecture/Multiprocessor (Flex/MP)—relies on the Extended Industry Standard Architecture (EISA) bus structure promulgated by Compaq and others. The Systempro deviates from the classical tightly coupled approach in that it features two buses—one for the CPUs, a second (EISA) for the I/O channels. An EISA bus controller manages communication between the two.

The Systempro can operate with two processors—any combination of 386 and 486 CPUs—which are added to the processor memory bus via plug-in sys-tem processor boards, with the 486 version providing a range of 8 to 40 MIPS. (MIPS, for millions of instructions per second, are a key metric of a computer’s processing capabilities.) Compaq says adding a second 386/33 (for 33MHz processor) almost doubles the computing performance to support processor-intensive applications, such as a database server in a LAN environment.

Compaq teams each processor with its own cache memory controller. This substantially increases execution performance by allowing each processor to store and fetch certain often used instructions and data from its own area of dedicated cache memory. In the Flex/MP system, bus master and direct memory access (DMA) activities, which slow a processor down by impeding its access to the system bus, take place on the EISA I/O bus, independently of the processor bus. This separation of the processor/memory subsystems from the expansion bus is important to end users with large investments in ISA/EISA-compatible expansion products (such as network interface cards, disk controllers, and video adapters). Compaq says this separation allows it to optimize high-speed processor and 486 processor technology without sacrificing compatibility with thousands of existing expansion boards.

Compaq’s Systempro super server relies on two buses to maintain compatibility with existing adapters, such as network interface cards, video boards, and disk controllers. This architecture allows Compaq to update the processor-memory bus as new technology develops without altering the I/O bus.

Compaq offers this example to show the performance benefits of its multi-processor system: As Compaq’s 32-bit intelligent drive array controller, work-ing in concert with two processors, loads data into the system memory via bus master transfers, one CPU manages request from NICs while the second sorts a database. This balanced approach—with the CPUs acting as dual partners— means no single subsystem limits overall system performance.

THE NETFRAME DESIGN

The NetFrame relies on a hierarchical I/O structure with a central system processor, which works with what NetFrame calls plug-in I/O and application servers. Depending on specific options, the system processor can be a 386 or 486, both operating at 25MHz.

Each application server contains its own processor and dedicated memory (from 4MB to 32MB), thus creating a standalone computer that can be dedi-cated to a specific application. For example, one application server could run a database, a second the LAN Manager network operating system, a third Novell’s NetWare 386. Various models of the NetFrame accommodate from three to eight of each add-on server board. The NetFrame’s I/O server boards can support several types of I/O devices through SCSI II, Ethernet and Token Ring adapters, and RS-232 serial or RS-422 LocalTalk connections. With industry standard interfaces like these, users can continue using the network inter-face adapters they know. They can also use any hard disk and controller sub-system compatible with the SCSI II standard.

In addition, because the application servers share access to the main memory, they can communicate with each other over the memory bus—that is, pass data packets back and forth across RAM. This means that individual applica-tion server boards running different network operating systems and/or under different physical-access methods could communicate directly across the RAM, bypassing slower cable communications. The NetFrame operates at eight times the throughput of a high-end PC or workstation, according to NetFrame.